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DV - SOC - Performance Verification

Santa Clara, CA — Full-time

Join the most cutting-edge and well-funded hardware startup in Silicon Valley as the SOC Design Verification Engineer responsible for a complex SOC using ARM architecture.  Our mission is to reimagine silicon and create computing platforms that will transform the industry. You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. We offer a fun, creative and flexible work environment, with a shared vision to build products to change the world.

As a SOC DV Engineer with a focus on System Performance measurement and analysis, you will work to understand the performance requirements of our SOC system and architect the required verification strategy.  You will help set up methodologies, come up with test plans, and verify that the design meets the highest quality standards.  You will work with various teams to define, implement and analyze performance testcases in the system.  We believe in early involvement of DV, so you will also participate in architecture/product definition through early involvement in the product life-cycle.

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Minimum qualifications

  • BA/BS degree in Electrical Engineering with 10+ years of practical experience
  • Strong fundamentals in digital ASIC verification
  • Strong programmable language experience is required (one or more of Verilog, SystemVerilog, Perl, Python, Tcl Scripts, Makefile and/or C++)

Preferred qualifications

  • MS degree in Electrical Engineering; 15 years of practical experience
  • A good understanding of the complete verification life cycle (test plan, testbench through coverage closure)
  • Expertise in ARM v8 and v9 specifications and their impact to SoC system architecture
  • Strong understanding of the ARM memory model and related issues. 
  • Understanding of major SOC interfaces like PCIE, DRAM, coherent socket to socket interfaces and related protocols is a plus.
  • Knowledge of FPGA and emulation platforms
  • Proficiency in UVM-SV, C/C++, PSS
  • Knowledge of assertion-based formal verification

Roles and Responsibilities

  • Contribute to verification architecture for a multi-core ARM SOC
  • Define verification architecture for multi-core subsystems, develop test plans and build verification environment
  • Define verification strategy for performance measurement and evaluation in RTL simulation and emulation environments
  • Build cohesive performance analysis with full system verification strategy
  • Work closely with the Performance Modeling team to define and analyze system performance metrics and standards
  • Build performance monitoring and measurement mechanisms
  • Build verification collateral around key ARM subsystem components
  • Build verification strategy for server-class compliance standards
  • Execute, debug and demonstrate compliance test-suites and software packages
  • Verify Subsystems and Full SoC using advanced verification methodologies
  • Build agents and checkers from scratch. Perform and write test plan from design architecture specs and/or protocol standard
  • Debug test cases and report verification result to achieve expected code/functional coverage goal
  • Assist in emulation, FPGA, prototyping efforts
  • Assist in silicon bring-up, debug and characterization
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