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DV - CPU (Cont)

Santa Clara, CA — Contract

Join the most cutting-edge and well-funded hardware startup in Silicon Valley as the engineer responsible for verification of a CPU. Our mission is to reimagine silicon and create computing platforms that will transform the industry. You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. We offer a fun, creative and flexible work environment, with a shared vision to build products to change the world.

As a Design Verification Engineer, you will work with chip architects to validate the concepts of CPU and SOC level micro-architecture. You will work on a selected part of the CPU design verification to ensure that it functions to the standards of being launch ready.

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Minimum qualifications

  • BA/BS degree in CS or EE with 3+ years of processor verification experience
  • In-depth knowledge of processor function, architecture, and micro-architecture
  • Experience in writing test plans, portable benches, transactors, and assembly
  • Experience with many different verification methodologies and tools such as simulators, coverage collection, gate level simulation, waveform viewers, or even mixed signal verification
  • Able to develop and work independently on a block/unit of the design

Preferred qualifications

  • MS/PhD degree in CS or EE with 5+ years of processor verification experience
  • Deep knowledge in processor verification function and architecture, in areas such as cache coherence, memory ordering and consistency, prefetching, branch prediction, renaming, speculative execution, and memory translation
  • Knowledge in Random Instruction Sequencing (RIS) and testing associated as block/unit and chip level for proving correctness
  • Have lead a small team of verification engineers doing CPU verification
  • Advanced techniques such as formal, assertions, and silicon bringup a plus

Role and Responsibilities

  • Work with CPU and SOC architects to understand concept and high level system requirements
  • Develop detailed test and coverage plans based on the architecture and micro-architecture
  • Develop verification methodology, ensuring scalable and portable environment
  • Develop verification environment, including all the respective components such as stimulus, checkers, assertions, trackers, coverage
  • Develop verification plans and test benches for your area 
  • Execute verification plans, including design bring-up, DV environment bring-up, regression enabling for all features under your care, debug of the test failures
  • Track and report DV progress using a variety of metrics, including bugs and coverage
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