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CPU Physical Design Engineer

Santa Clara, CA — Full-time

Join the most cutting-edge and well-funded hardware startup in Silicon Valley as a CPU Physical Design Engineer. Our mission is to reimagine silicon and create computing platforms that will transform the industry. You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. We offer a fun, creative and flexible work environment, with a shared vision to build products to change the world.

As a CPU Physical Design Engineer, you will work with microarchitecture and RTL design team to implement the designs meeting aggressive power, area and performance goals using industry standard tools/flows. 

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Minimum qualifications

  • BA/BS degree in Electrical Engineering with 5+ years of practical experience
  • Experience with Synthesis, place and route and signoff  timing/power analysis
  • Knowledge of high performance and low power implementation methods
  • Knowledge of CPU microarchitecture, logic design and circuits

Preferred qualifications

  • MS degree in Electrical Engineering; 10 years of practical experience
  • Knowledge of CPU microarchitecture
  • Experience in deep submicron process technology nodes is strongly preferred
  • Knowledge of library cells and optimizations
  • Solid understanding industry standard tools for synthesis, place & route and tapeout flows

Roles and Responsibilities

  • Work with CPU microarchitecture team to understand specifications and design trade offs in pipeline and structure sizing.
  • Perform feasibilities to validate implementability, area, timing and power. 
  • Synthesize the Verilog RTL into gate level designs and perform optimizations.
  • Perform SynthPlace & Route on the designs using industry standard tools and deliver GDS.
  • Optimize the design at various stages from RTL to GDS to meet timing, power and area goals. 
  • Validate the designs for functional and electrical robustness.
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